One of the benefits of clustered pipeline architecture is that we have smaller register files in each cluster. Smaller register files translates into faster access to registers. Additionally,splitting the physical register file into multiple smaller pieces allows for more registers to be accessed in parallel for minimal additional power and area overhead. For architectures with high degree of parallelism (8 way supercalar as an example), many registers will be accessed at the same time, thus it is important to reduce RF (Register File) access time. One unwanted side effect is the extra communication overhead between clusters due to possible intercluster dependencies.
For more information about this architecture and its benefits and drawbacks you can read : http://www.hpl.hp.com/techreports/98/HPL-98-204.pdf
Dispatch Bound: In dispatch bound, the issue queue contains reservation stations (Memory elements that will hold the value of dependents once ready). For example, when aninstruction is decoded, its dependents are read from the register file whenready,andwhentheinstruction moves to the functional unit, the values are also sent with the instruction.
If the dependants are not ready, these dependants will be forwarded to the issue queue and stored in the reservation entities once the producing instruction completes.
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