Vhdl code for a simple alu
ENGR3701 Computer Organisation and Design: ALU of the CPU
In this project you will create a simple 8?bit system capable of performing a similar cyphertask. You will be provided with a simple test program to evaluate the operation of your CPU
Aim
Develop an 8?bit single or multi?cycle CPU to perform a simple rotor based cipher task.
CPU
Instruction Set
Memory
Single read port – single write port memory (RAM) that can store up to 128 bytes accessed on 8?bit boundaries.
Memory mapped IO – 128 bytes on 8?bit boundaries. This represents a series of registers that are implemented externally to the CPU but share the same address bus, read, and write ports as the RAM module. A write enable signal and a multiplexor should be configured such that addresses 0 to 127 refer to RAM, while 128 to 255 refer to the external IO. Your CPU component should include ports connecting these signals to a toplevel component, but the IO registers themselves do not need to be implemented.
ALU
Answer:
Introduction
Arithmetic And Logic Unit:
p>ALU is Heart of any processor. It performs both arithmetic and logical operations. It performs arithmetic operations like addition, subtraction, multiplication etc and logical operations like AND, OR, XOR etc… ALU also performs operations like one’s complement, two’s complement for given input. ALU also has two registers for inputs and one register for output.
For example If we give two operands for addition, then the result will be produced as output that is sum of given two numbers ("VHDL Primer", 2018). ALU uses clock cycles for its operations. ALU computes results for every positive edge of the clock cycle
Design Of 8-Bit Adder And Sub-Tractor
Design Of 8-Bit Logical Block
Design of comparator
Consider two inputs A and B. This comparator generates high signal for three cases.
Below diagram shows selection lines for 8-bit ALU
| SELECT LINES | operation |
| 000 | Addition |
| 001 | Subtraction |
| 010 | AND |
| 011 | OR |
| 100 | NOT |
| 101 | XOR |
| 110 | 2’s Complement |
| 111 | Compare |
Vhdl Design:
VHDL is a programming language. Digital system models are constructed by using this language.
VHDL is an entity. This entity is help to examine the hardware modules. The entity contents are,
(i)Architecture
Architecture:
It contains behavioral, structural, dataflow or mixed style.
Behavioral Modeling:
Entities are present in this modeling style. Entity means set of statements. This statements are executed sequentially. Only the statements are present process, function or procedure.
There are three types of sections are present in code.
They have no limitations for sequential logic. This is the major aspect of behavioral modeling. We have to build combinational circuits and sequential circuits. IF, WAIT, CASE these are present in behavioral statements. Sequential code only used to variables. The variable values only passed out indirectly.
Dataflow Modeling:
The flow of data present in entity. This entity is described using parallel (concurrent) signals.
(iii)SII
(iv)*
(iv)The WHEN statements
These are used to concurrent code.
Structural Modelng:
AND GATE – logic Operation:
Figure 2 AND gate
Table 1Truth Table for AND gate
XOR Gate –Logic operation:
Vhdl Code For A Simple Alu
VHDL code for simple ALU is given below:
VHDL plays a vital role in electronic applications. We can design code for microcontroller, filter, ram, finite state machines, comparator, and counters and so on.


