to build and analyse the operation of an asynchronous counter
to modify the counter so that it will both count up and count down
to design and simulate a three digit decade counter.
1. Construct the following circuit, with J = K = ‘1’ for both flip-flops.
2. Connect the Q outputs to LEDs and the clock input to the one-shot signal generator on the Logic Tutor.
3. Clear the counter and apply successive clock input pulses and record the Q outputs in Table 2(a).
|Table 2(a)||Table 2(b)|
4. Now substitute the one-shot clock signal for the low frequency clock on the Logic Tutor and sketch the Clock, QA and QB output waveforms above each other on the same time axis.
5. Transfer the clock connection from the Q to QBAR output and repeat the above, enter your results in Table 2(b) and sketch the waveforms as before.
6. What is the difference between the two circuits?
Up / Down Selector
1. Construct the two input multiplexer circuit shown below.
2. Construct a truth table to prove that when S = ‘1’, Y follows A, when S = ‘0’, Y follows B
3. Connect the multiplexer circuit in between the two flip-flops such that Q is connected to A, QBAR to B and Y to the clock input of the second flip-flop.
Confirm that your counter counts up or down, depending on whether S is ‘1’ or ‘0’
Design and simulate a three digit BCD counter, i.e. a counter that will count to 999 and then reset to 000. The output should be displayed on three seven segment displays.
Print out the circuit diagram and briefly describe the operation of your circuit
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